Apple Plans to Make Its Own Future iPhone Processors

15 09 2008

The magic of social networking has confirmed that Apple plans to make its own ARM-based processors for future versions of the iPhone.

The New York Times spotted the LinkedIn profile of Wei-han Lien, Apple’s senior manager of CPU development, over the weekend. Lien’s job description, according to his profile, involves managing the ARM CPU design team for Apple, an extension of his previous work at P.A. Semi.

It’s been pretty clear for a while that Apple bought P.A. Semi earlier this year to work on developing its own chips for the iPhone, but as the Times points out, Apple has never specifically said that it planned to make CPUs: many different chips inside a modern smartphone use a processor based on one of ARM’s cores.

However, CEO Steve Jobs did say that Apple was planning to have the engineers make “system-on-chips” for the iPhone, which implies they were tackling the whole package, CPU included. Another solid hint was the disappointment expressed by Intel’s Pat Gelsinger over missing out on the design win for the next-generation iPhone, as well as Apple’s apparent decision to secure an architectural license for the ARM core.

Intel Lists New Low-Cost Processors

1 09 2008

Intel updated its processor pricing list with low-cost quad-core and Core 2 Duo desktop processors. A new Celeron D model was also listed.

Intel lists the Q8200 at $224, one of the least expensive quad-core chips that the company now offers. The venerable Q6600 is the only Core 2 Quad that is less expensive.

The 45-nanometer processor has a core clock speed of 2.33GHz and 4MB of cache memory. This is a relatively small amount of cache memory as most Intel desktop quads offered now come with 6MB, 8MB, or 12MB of cache memory. Generally, the more cache memory the better the performance.

The chip has a front-side bus speed of 1333 MHz. The front-side bus carries data between the processor and other silicon.

Intel also shows a new E series Core 2 Duo processor. The E5200 is priced at $84, the lowest-cost Core 2 Duo chip on the list. It has a core clock speed of 2.5GHz, 2MB of cache memory, and an 800MHz front-side bus.

Intel also lists a new Celeron D processor for $53. The 450 slots in above the current 440. The 450 runs at 2.2GHz, has 512K of cache memory, and an 800MHz front-side bus.

The Intel processor pricing list was updated on August 31.

intel’s Processor History Until 2012

14 08 2008

With Intel’s Developer Forum just days away, an apparently leaked presentation for the event indicates where the chipmaker’s processors are headed over the course of the next four years.

The slides obtained by French tech site CanardPlus start off by recapping the imminent launch of Nehalem, which is now officially labeled Core i7 and is the first big break from Intel’s traditional architecture. As is increasingly well-known in tech circles, i7 will switch to a new point-to-point bus architecture and return the Pentium 4’s Hyperthreading feature, which can sometimes mimic a second core by running more than one code thread at the same time. The technology is already set to be discussed in-depth at the Developer Forum and will launch in the fall with new Core and Xeon desktop processors.

It’s here, however, that the presentation veers into largely unfamiliar territory. Apart from planning a chip die shrink to 32 nanometers for i7 due later in 2009, known as Westmere, Intel’s next big change in architecture is now set to take place in 2010 with a technology known as Sandy Bridge.

While lightly discussed in the past, Sandy Bridge is now said to focus heavily on vector math — an important component to certain 3D and movie operations and once the strongest selling point of PowerPC-based Macs. The processor design will introduce support for new programming features known as Advanced Vector Extensions, or AVX, which will not only be much more complex with 256 bits of data versus 128 for today’s SSE equivalents but will support as many as three or four calculations in one instruction depending on the task at hand.

The overhaul of Intel’s chip design will also be built with the capability to handle at least eight cores on a single chip and will have much less Level 2 memory cache than today, at just 512KB per core, in return for 16MB of Level 3 to be distributed among all the cores. This architecture will be shrunk sometime in 2011 when it’s known as Ivy Bridge, according to Intel.

Intel Releases USB 3.0 Specifications

14 08 2008

Intel has released a specification revision for next-generation USB 3.0 technology that resolves a dispute with Nvidia and Advanced Micro Devices, who had threatened to develop their own USB 3.0 standard.

On Tuesday, Intel released what it calls the Extensible Host Controller Interface (xHCI) draft specification revision 0.9 in support of the USB 3.0 architecture. The draft specification provides a standardized method for USB 3.0 hardware to communicate with USB 3.0-specific software. Intel said the specification is “90%” complete at this point.

USB 3.0–also known as SuperSpeed USB–is a next-generation high-speed connection standard due in 2009. It is significant not only because all future PCs and devices will use connectors based on the standard but because it will offer 10 times the speed of USB 2.0–used in virtually all PCs introduced in the last few years–or roughly 5 gigabits per second.

“Interoperability among devices from multiple manufacturers is important for consumer adoption of SuperSpeed USB products,” Intel said in a statement. The draft specification revision will make it easier to develop software support for the industry, according to Intel.

The updated specification is being made available under royalty free licensing terms to all USB 3.0 Promoter Group and contributor companies “that sign an xHCI contributor agreement,” Intel said.

A statement from Advanced Micro Devices was included in the announcement: “USB 3.0 is an answer to the future bandwidth need of the PC platform. AMD believes strongly in open industry standards, and therefore is supporting a common xHCI specification.”

AMD’s support came with a qualifier, however. “Its a shame that it took the reality of an alternative spec to make this come true. Intel should have opened it up without this. One has to question a monopolist leading a spec like this in the future,” a source close to AMD said.

Microsoft and Dell also voiced support.

Intel said it plans to make available a revised xHCI 0.95 specification in the fourth quarter. The updated revision of the specification will also be released under royalty-free licensing terms via an xHCI adopter’s agreement.

Intel’s Core i7 Chip Based On Company’s Nehalem Design

11 08 2008

Yesterday, Intel announced that it plans to sell its next generation of chips as part of the popular “Core” line, and the first chips will carry an “i7″ identifier.

The microprocessors are based on a design the company has code-named Nehalem and are expected to be in production the last three months of this year. Intel says the new design will deliver both high performance and energy efficiency. The chip set will, in its first generation of products, sport all four cores on a single piece of silicon, being the first from Intel to do so. A black label version called the Extreme Edition will arrive alongside the standard i7, and will be geared more toward the high end market.


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